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Timna was the codename of a proposed central processing unit (CPU) family by Intel. The project was announced in 1999 and was designed in Haifa, Israel; "''Timna''" is also the name of a valley in Israel. The chip was supposed to be Intel's first CPU with an integrated graphics processing unit (GPU) and random access memory (RAM) controller which was designed to work with the RDRAM type of RAM. The price of RDRAM did not drop as expected by Intel. It was decided to use the Memory Translator Hub (MTH) that is also used by the Intel 820 chipset to link Timna with the SDRAM type of RAM. Later, a serious defect was discovered in the design of the MTH and so the Intel 820 based motherboards using it had to be recalled. The MTH was rebuilt again but problems remained. The GPU (codenamed ''Capitola'') that was to be used in conjunction with Timna was based on i752/i754 that were used with 810/815E chipsets. Timna was canceled on September 29, 2000. The processor was expected to be clocked from 600 MHz to 700 MHz, use a 133 MHz front-side bus (FSB), have a L2 cache size of 128 KB, and was to be manufactured at a 180 nm process. Intel Haifa was later tasked to be the backup team for intel's mobile CPU design. Their knowledge of Timna's P6 derived architecture heavily influenced their project Banias. ==See also== *Intel 80386EX *Tolapai 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「Intel Timna」の詳細全文を読む スポンサード リンク
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